Multiple-Valued Logic as a New Computing Paradigm – A Brief Survey of Higuchi’s Researchon Multiple-Valued Logic
MICHITAKA KAMEYAMA, TAKAHIRO HANYU and TAKAFUMI AOKI
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Exact and Heuristic Minimization of the Average Path Length in Decision Diagrams
SHINOBU NAGAYAMA, ALAN MISHCHENKO, TSUTOMU SASAO and JON T. BUTLER
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Four-Valued Magnetic Random Access Memory Based on Magneto Tunnel Junction and Resonant Tunneling Diode
TETSUYA UEMURA and MASAFUMI YAMAMOTO
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Design of a Low-Power Multiple-Valued Integrated Circuit Based on Dynamic Source-Coupled Logic
AKIRA MOCHIZUKI, TAKAHIRO HANYU and MICHITAKA KAMEYAMA
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Control Signal Multiplexing Based Asynchronous Data Transfer Scheme Using Multiple-Valued Bidirectional Current-Mode Circuits
TOMOHIRO TAKAHASHI and TAKAHIRO HANYU
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Design of Multiple-Valued Logic Circuits Using Graph-Based Evolutionary Synthesis
MASANORI NATSUI, NAOFUMI HOMMA, TAKAFUMI AOKI, and TATSUO HIGUCHI
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Prototype Fabrication of Field-Programmable Digital Filter LSIs Using Multiple-Valued Current-Mode Logic – Device Scaling and Future Prospects
KATSUHIKO DEGAWA, TAKAFUMI AOKI and TATSUO HIGUCHI
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Terary GFSOP Minimization Using Kronecker Decision Diagrams and Their Synthesis with Quantum Cascades
MOZAMMEL H. A. KHAN, MAREK A. PERKOWSKI, MUJIBUR R. KHAN and PAWEL KERNTOPF
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Intra/Inter-Chip CDMA Communications for Efficient Data Transmission Towards New Paradigm of Computing
YASUSHI YUMINAKA
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Logic-in-Memory VLSI circuit for Fully Parallel Nearest Pattern Matching Based on Floating-Gate-MOS Pass-Transistor Logic
TAKAHIRO HANYU, SHUNICHI KAERIYAMA and MICHITAKA KAMEYAMA
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