Journal of Multiple-Valued Logic and Soft Computing

Volume 13, Number 4-6, 2007

37th International
Symposium on Multiple-Valued Logic
Oslo, Norway
May 13—16, 2007

Guest Editor Bernd Steinbach
Institute of Computer Science
University of Mining and Technology
Freiberg, Germany


i-ivpp.
Foreward
full text

279-294pp.
Characterization of Ternary Cofactors in the Spectral Domain
Claudio Moraga,Milena Stankovic and Suzana Stojkovic
abstract
full text

295-320pp.
On Generalized Entropy and Entropic Metrics
Dan Simovici
abstract
full text

321-334pp.
The Rough Powerset Monad
P. Eklund and M. A. Galán
abstract
full text

335-352pp.
Effective Non-deterministic Semantics for First-order LFIs
Anna Zamansky and Arnon Avron
abstract
full text

353-366pp.
Some Polynomials Generating Minimal Clones
Hajime Machida and Michael Pinsker
abstract
full text

367-378pp.
Restriction-closed Hyperclones
Boris A. Romov
abstract
full text

379-396pp.
Family of Fastest Linearly Independent Transforms over GF(3): Generation, Relations, and Hardware Implementation
B. J. Falkowski, C. C. Lozano and T. Luba
abstract
full text

397-414pp.
Automated Reasoning in Some Local Extensions of Ordered Structures
Viorica Sofronie-Stokkermans and Carsten Ihlemann
abstract
full text

415-446pp.
Some Criteria for Partial Sheffer Functions in k-valued Logic
Lucien Haddad and Dietlinde Lau
abstract
full text

447-466pp.
Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices
Krzysztof S. Berezowski and Sarma B. K. Vrudhula
abstract
full text

467-486pp.
Interpretations of the Sampling Theorem in Multiple-Valued Logic
Radomir S. Stankovic and Jaakko T. Astola
abstract
full text

487-502pp.
Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams
Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki and Tatsuo Higuchi
abstract
full text

503-520pp.
Design Methods for Binary to Decimal Converters Using Arithmetic Decompositions
Yukihiro Iguchi, Tsutomu Sasao and Munehiro Matsuura
abstract
full text

521-536pp.
Implementation Complexity of Algorithms for Optimization of Galois Field Expressions for Multiple-Valued Functions
Dragan Jankovic, Radomir S. Stankovic and Claudio Moraga
abstract
full text

537-552pp.
QMDD Minimization Using Sifting for Variable Reordering

D. Michael Miller, David Y. Feinstein and Mitchell A. Thornton
abstract
full text

553-568pp.
Universal VLSI Based on a Redundant Multiple-Valued Sequential Logic Operation
Tasuku Ito and Michitaka Kameyama
abstract
full text

569-582pp.
Equalization Techniques for Multiple-Valued Data Transmission and Their Application
Yasushi Yuminaka and Kazuyoshi Yamamura
abstract
full text

583-604pp.
GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits
Mozammel H. A. Khan and Marek A. Perkowski
abstract
full text

605-618pp.
The Genetic Code as a Function of Multiple-Valued Logic Over the Field of Complex Numbers and its Learning using Multilayer Neural Network Based on Multi-Valued Neurons
Igor Aizenberg and Claudio Moraga
abstract
full text

619-632pp.
Low-Power Multiple-Valued Reconfigurable VLSI Using Series-Gating Differential-Pair Circuits
Nobuaki Okada and Michitaka Kameyama
abstract
full text