Reduction of Leakage Parameters of FinFET Based Priority Encoder Using SVL Technique at 45nm Technology
Vishwas Mishra and Shyam Akashe
Now days low power devices are getting more attention in electronics field so recent year designers have designed devices in a way that they consumes less power but obstacles are in maintaining parameter like area, total power and leakage power to achieve system goal. VLSI technology has got enormous in last few years and chip size is scaling down rapidly whose result is that density and complexity of chip has been increased rapidly. The first aim of designer is to design low power devices that fulfill the requirements of the systems. Leakage power is attentive parameter to design low power devices because it plays a major role to increase the total power consumption of the devices. Self-controllable voltage level (SVL) is power switch technique for leakage reduction in the device. It reduces the leakage power because SVL can assert maximum supply voltage in active mode and decrease the supply voltage in stand-by mode. Designing and calculation of parameters of FinFET based Priority Encoder using SVL technique has been done in 45 nm technology with different operating voltage 0.3V, 0.5V, and 0.7V and that was done with cadence virtuoso tool.
Keywords: FinFET, Leakage Reduction Technique, SVL, USVL, LSVL