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Modeling and Simulation of Low Power FLIMOSFETs Taking into Account the Interelectrode Capacitances
A. Galadi, F. Morancho, M.M. Hassani

In this paper, a SPICE-compatible circuit model for the low voltage power FLIMOSFET’s is presented. This modeling is based on the device physics of the FLIMOS structure and uses a block-diagram (ABM module of SPICE) to describe the Miller capacitance (Cgd) of the device. The short channel effects are taken into account in the SPICE model parameters. Finally, the model is validated by the comparison of simulated and measured static and dynamic characteristics of the FLIMOS transistor.

Keywords: SPICE-compatible model; power VDMOS device; FLIMOSFET; interelectrode capacitances.

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