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Time-Domain Pre-Emphasis Techniques for Multiple Valued Data Transmission
Yasushi Yuminaka and Yasunori Takahashi

This paper presents a new equalization technique based on a Pulse-Width Modulation (PWM) pre-emphasis method which utilizes time-domain information processing to increase the data rate for a given bandwidth of VLSI interconnection. The pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower voltage headroom. We discuss new time-domain pre-emphasis techniques especially for multiple-valued data transmission in order to provide a high-speed interface in VLSI systems.

Keywords: High-speed interface, pre-emphasis, equalization, multiple-valued logic.

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