A Bandwidth-Efficient Ternary Signaling Scheme for 1-D Partial-Response Channels
Yasushi Yuminaka and Kyohei Kawano
This paper describes a bandwidth-efficient ternary signaling scheme for capacitively coupled chip-to-chip data transmission to increase data rate. Partial-response coding is known as a technique that allows high-speed transmission while using a limited frequency bandwidth, by allowing controlled intersymbol interference (ISI). Analysis and circuit simulation results are presented to compare two types of partial-response signaling, duobinary (1 + D) and dicode (1 − D) signaling for capacitively coupled interface.
Keywords: High-speed interface, Partial-response signaling, Equalization, Multiple-Valued Logic, Capacitively coupled interface