Ultra-Low Power Hybrid GDI Full Adder for Biomedical Signal Processing Devices
Anupam Vyas, Shyam Babu, Prashant Upadhyaya and Nishtha Vyas
The demand for compact, low-power systems-on-chip (SoCs) in healthcare devices has increased significantly, driven by the need for efficient human– machine interaction and longer battery life. One of the main challenges in these embedded systems is reducing power consumption without compromising performance. In this work, we propose a hybrid 1-bit GDI full adder (FA) circuit designed for energy efficiency and low power, which can be embedded to enhance the performance of healthcare and wearable devices. The circuit was simulated using Siemens EDA tools at a 0.13 μm technology node. For comparative analysis, the performance metrics were used to compare the results with those of the existing adder circuit. The results demonstrate that the proposed design significantly reduces power dissipation, making it suitable for compact healthcare applications.
Keywords: 0.13 μm, Biomedical Signal Processing, ultra-low Power, GDI, CMOS, Healthcare, XOR-XNOR circuit