An Empirical Analysis of Lightweight Cryptographic Algorithms on Resource-Constrained FPGA Based IoT Devices
Ankita Sarkar and Mansi Jhamb
Ensuring data integrity is a crucial aspect of secure communication among interconnected smart devices. These systems typically employ FPGA, ASIC, or embedded processors as their core computational units. Due to their design constraints, such platforms operate with limited memory, computational power, and energy resources. This study provides a comprehensive evaluation of various lightweight block cipher algorithms namely AES, XTEA, PRESENT, PRINCE, SIMON (64/128 parallel and serial variants), RECTANGLE (80/128), Klein, and mCrypton implemented on resource-constrained FPGA-based IoT architectures. Among these, AES remains widely adopted due to its balanced performance, offering a data throughput of approximately 17.7 bytes/s and a key scheduling throughput of 35.5 bytes/s. Conversely, PRESENT, recognized as one of the earliest ultra-lightweight ciphers, demonstrates superior energy efficiency with a minimal on-chip power consumption of around 111 mW. The comparative analysis highlights the trade-offs between power efficiency, hardware utilization, and throughput across different lightweight cryptographic implementations.
Keywords: AES, PRESENT, PRINCE, XTEA, Embedded systems, Internet of Things (IoT)