Efficient and High-Performance MTCMOS Employed 34T-Full Subtractor
Aditya Sharma, Nikhil Saxena and Amit Singh Rajput
Non-regenerative circuits have vast utilizations in various electronic devices, computing devices and memory devices. There are various circuit designs to instrument a given logic function. The parameter that is dominant in high performance digital circuitry is the speed while in battery driven circuit is power dissipation that ultimately results due to leakage in the circuits. The other reason being the continuous scaling of technology has also resulted in increase of leakage parameters. In this paper, low leakage low power consuming 34 transistor full Subtractor using MTCMOS design technique has been proposed in active and standby mode at different supply voltages. This paper also focused on the minimum voltage that can be used in 45 nm technology using cadence virtuoso tool. Sleep mode leakage current of MTCMOS full subtractor at 0.5V was found to be 4.97fA and during active mode 1.45 pA.
Keywords: CMOS, Full Substractor, MTCMOS, High Vt transistors and Low power