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Low-Power Pre-Amplifier Based Latch Comparator Design Using FinFET Technology
Devansh Sinha and Shyam Akashe

Comparators are one of the most important components of analog to digital converters due to its high speed, low power and area efficiency. In this paper we have proposed a design of preamplifier latch comparator which is carried out through FinFET technology. In the proposed design we have used a preamplifier circuit, latch and output buffer. Preamplifier helps us to reduce the input offset voltage and kickback noise. It also helpful in the amplification of the voltage obtained from the resistor ladder of flash analog to digital converters. Proposed design is much more suitable for low power and fast analog to digital converters. Proposed design shows low power dissipation of v and low offset voltage of v with propagation delay of ns. The circuit is simulated with a power supply of 0.7v and clock frequency of 100MHz.

Keywords: FinFET, power dissipation, preamplifier, offset voltage, kickback noise

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