Low Power Switch Mode Power Supply Employed with Efficient DTCMOS Power Reduction Technique
Gajendra Gupta, Sumit Mohanty and Shyam Akashe
The SMPS is an electronic power supply which is generally used to incorporate a switching regulator by which electrical power can be covert efficiently. The transformation of power to the D.C load can be achieved by SMPS. This paper presenting the new SMPS circuit which is employed with the efficient power reduction techniques that is DTCMOS (double threshold). The proposed work is intentionally concentrated to overcome the limitations and disadvantages of four transistor CMOS based SMPS and the conventional linear regulated power supply. The size of main transformer in the SMPS circuit has been reduced in a size and the weight by employing the HF (high-frequency transformer) which also reduce the circuit complexity and become smaller compare than earlier SMPS circuit. The ruffle in high frequency occurs in circuit can be easily filtered by using small riddle component which is produced by circuit. In the new enhanced work the average power dissipation is reduced up to 3.26μw and other parameter is also improved. The 45 nm technologies are employed for all the proposed work at cadence virtuoso tool and O.7v power is supplied for enhanced design.
Keyword: SMPS, high frequency (H.F), double threshold voltage, delay, CMOS technology