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Effect of Oxide Layer Thickness on Device Performances of Underlap AlInN/GaN DG MOS-HEMT
Nandkishor Chavan, Dilip Jaiswal and Hemant Pardeshi

This work attempts to analyses the effect of oxide layer thickness on the performance of Underlap Double Gate (DG) AlInN/GaN Metal Oxide Semiconductor High Electron Mobility Transistor (MOS-HEMT) device. The device has a hetrostructure of lattice-matched wideband AlInN and narrowband GaN layers in the channel and Al2O3 in the oxide layer. The effect of Al2O3 thickness on device performance is analyzed using Sentaurus TCAD simulation software. The hydrodynamic model used in the simulation is calibrated with the previously published experimental result. A comprehensive, quantitative investigation of transfer characteristics, output characteristics, transconductance (gm), transconductance generation factor (TGF), threshold voltage (Vt), subthreshold slope (SS) and drain induced barrier lowering (DIBL) is done for varying Al2O3 thickness. As oxide thickness increases drain current ID, SS and DIBL increases. On the contrary, increase in oxide thickness results in decrease of gm, TGF and Vt decreases. These results demonstrate the feasibility of obtaining desired set of device properties by tuning the oxide thickness.

Keywords: AlInN/GaN, MOS-HEMT, oxide thickness, sentaurus TCAD, short channel effects

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