Design and Analysis of Low Voltage High-Performance Schmitt Trigger Using Efficient Leakage Reduction Technique
Deeksha Kulshrestha, Meenalakshmi and Shyam Akashe
Schmitt trigger can be defined as the comparator circuit that is used to compare the input signal with the chosen threshold level. Output level relies on input state. If the input state crosses the given threshold then only the output will change. A leakage power reduction technique like DTCMOS (dynamic-threshold CMOS) is applied in this paper due to which leakage current and power consumption has been reduced. Dynamic threshold MOSFET (DTCMOS) transistor uses dynamic body bias because in DTCMOS, substrate (or body) and gate of MOSFET are tied together. In this paper the 4T Schmitt trigger with DTCMOS is compared with the proposed Schmitt trigger using DTCMOS. The tool at which the simulation has been done is cadence virtuoso at 45nm technology. The result shows the leakage power reduction for the proposed work. Leakage current by using DTCMOS technique is 7pA.
Keywords: Schmitt trigger, DTCMOS, leakage current, low power, noise