Design of Low Power Schmitt Trigger Using Mtcmos Technique
Deeksha Kulshrestha, Meenalakshmi and Shyam Akashe
Schmitt trigger can be defined as the comparator circuit that is used to compare the input signal with the chosen threshold level. Output level relies on input state. If the input state crosses the given threshold then only the output will change. A leakage power reduction technique like MTCMOS (multi-threshold CMOS) is applied in this paper due to which leakage current and power consumption has been reduced. In MTCMOS technique sleep transistors are used for reducing power. Logic is supplied by virtual power rail. The tool at which the simulation has been done is cadence virtuoso at 45nm technology. The result shows the leakage power reduction for the proposed work. Leakage current by using MTCMOS technique is 1.173pA.
Keywords: Schmitt trigger, MTCMOS, leakage current, noise, low power