Study the Source Resistance Sensibility Under the Effect of Buffer and the Substrate for HEMT’s Devices Source Resistance Sensibilityfor HEMT
In this paper, we present the dependent of source resistance sensibility to the gate bias effect for a HEMT using the D-D model (Drift-Diffus model) with TCAD SILVACO tool. The obtained results show that the increases of gate bias effect on substrate lead to decreasing the source resistance for simulated device. The reported increase in the effect of gate induces the increases of transferred holes concentration towards the source region and which induce the decreases of source resistance. The decrease of source resistance can also be made by reducing the Buffer thickness which leads to an increase in the gate effect on the substrate. The source resistance value is influenced by the DIBL( Drain-induced barrier lowering) effect where the rate of decreasing the source resistance will be decreasing consequently to increase the drain bias. The reduction of the source resistance induces the increasing of device sensibility for lows values of current. This the first study that reports on reducing the source resistance related to the gate effect which lead to ensure the possibility of using this device in the field of bio-engineering in where these remarkable results will be added to the high frequency of HEMT.
Keywords: HEMT, substrate, devices performances, source resistance, holes concentration, gate effect, low power devices