A Novel VLSI Architecture for Hybrid DCT-SVD Image Coding Algorithm
Sajad A. Lone, Qazi Faheem, Abdul Moyeen, Divya and Humyra Shabir
In this paper we presented an area and power efficient architecture for a Hybrid DCT-SVD image coding Algorithm. The DCT is applied to those blocks in the source image which show higher inter-pixel correlation. The blocks with higher frequency content are transformed using SVD. The architecture calculates the standard deviation of each block of the source image and decides which transform must be used on that block. Simulation results show lesser distortion and better image quality, especially in images which are less spatially correlated. In addition to attain higher compression ratio, the SVD encoder is optimized by making it to calculate and transmit relatively few eigen vectors by coding the eigen vectors using an Online Adaptive Vector Quantization (OAVQ) technique. VHDL coding of the architecture has been done, functional and timing analysis has been performed and optimized code has been synthesized. The architecture uses a Microprogramming Controller and therefore is programmable, making it flexible and reconfigurable. It can be extended to other transforms as well.