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IDDQ Based Testing of Submicron CMOS Digital-to-Analog Converter Circuits
Siva S.Yellampalli and A. Srivastava

In this paper, ∆IDDQ testing of a 12-bit digital-to-analog converter (DAC) chip designed in 0.5μm n-well CMOS process is presented. The built in current sensor (BICS) uses frequency as the output for fault detection in circuit under test (CUT). A fault is detected if it causes the output frequency to deviate more than ±10% from the reference frequency. A set of eight faults simulating manufacturing defects in CMOS devices were injected and randomly distributed using fault-injection transistors (FITS). It is shown that the present method detected all injected faults.

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