IJUC HomeIssue Contents

Special Issue
Memristor Models, Circuits and Architectures

p. 247-250
Editorial Note on Memristor Models, Circuits and Architectures
Georgios Ch. Sirakoulis and Said Hamdioui
Abstract
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p. 251-264
Statistical Analysis for Memristor Crossbar Memories
Rawan Naous, Mohammad Affan Zidan, Ahmed Sultan and Khaled Nabil Salama
Abstract
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p. 265-280
2T1M-Based Double Memristive Crossbar Architecture for In-Memory Computing
Ioannis Vourkas, Georgios Papandroulidakis, Georgios Ch. Sirakoulis and Angel Abusleme
Abstract
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p. 281-302
Universal Emulator of Memristive and Other Two-Terminal Devices
Dalibor Biolek, Zdenek Kolka, Jiri Vavra and Doan Sang Van
Abstract
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p. 303-317
Memristive Sorting Networks Enabled by Electrochemical Metallization Cells
L. Nielen S. Ohm, O. Šuch, M. Klimo, R. Waser and E. Linn
Abstract
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p. 319-337
Implementation of a Deep ReLU Neuron Network with a Memristive Circuit
Martin Klimo, Peter Tarábek, Ondrej Šuch, Juraj Smieško and Ondrej Škvarek
Abstract
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p. 339-340
Meet the Editors: Kenichi Morita
Abstract
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