JAPED HomeIssue Contents

p. 1-11
Reduction of Leakage Parameters of FinFET Based Priority Encoder Using SVL Technique at 45nm Technology
Vishwas Mishra and Shyam Akashe
Abstract
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p. 13-21
Bit Error Rate Analysis of STBC-OFDM System with the Help of Clipping Technique
Sourabh Sharma, Ritu Chauhan and Narendra Singh Thakur
Abstract
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p. 23-39
Design and Analysis of Low Power Memristor Based Non-volatile 4T SRAM Cell with Power Reduction Techniques
Neha Borkar and Shyam Akashe
Abstract
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p. 41-54
Influence of Inter-Shell Distance on Propagation Delay and Power of Mwcnt Bundle at Local Interconnect
Akshi and Karamjit Singh Sandha
Abstract
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p. 55-61
Dynamic Power Dissipation Analysis in CMOS VLSI Circuit Design with Scaling Down in Technology
Manish Kumar
Abstract
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p. 63-71
A Fast and Reduced Complexity Wallace Multiplier
Inamul Hussain and Manish Kumar
Abstract
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p. 73-87
Investigation of Conduction Mechanism in Polymer Thick Film Resistors Trimmed by Multiple High Voltage Impulse Method
Busi Rambabu, B. Poornaiah, KV Subrahmanium and Y. Srinivasa Rao
Abstract
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p. 89-108
Versatile Digitally Reconfigurable Current-mode Multifunctional Biquadratic Filter and Quadrature Oscillator
Ale Imran, Deepesh Arora and Rishabh Kumar
Abstract
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p. 109-117
Design of High Voltage Level Shifter Using SVL Technique
Rashmi Sharma and Shyam Akashe
Abstract
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p. 119-129
Performance Analysis of Noise and Low Power in Memristor Based 2:1 Multiplexer Using FinFET
Arpana Verma and Shyam Akashe
Abstract
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p. 131-146
Microwave Interactions in Polyvinyl Chloride–Graphite Thick Film Resistors
K. V. Subrahmanium, Busi Rambabu, B. Poornaiah and Y. Srinivaasa Rao
Abstract
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p. 147-155
Comparator Optimization of Flash ADC
Umesh Kumar and Ashish Mishra
Abstract
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p. 157-172
Gain and Phase-Improved Substrate-Biased Multi-Gate Based OTA Using Quasi-Compensation Technique
Aditya Raj and Shyam Akashe
Abstract
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